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DTSTAMP:20260628T044039Z
UID:27e0b9cd-a149-4d5f-b653-0fc0c76e1d28
DTSTART:20150223T080000Z
DTEND:20150227T173000Z
DESCRIPTION:\n	Goals\nThis workshop organized by VI-HPS for the GermanPrace
  Advanced Training Centre hosted by HLRS will:\n		give an overview of th
 e VI-HPS programming tools suite\n	\n		explain the functionality of indivi
 dual tools\, and how to use them effectively\n	\n		offer hands-on experien
 ce and expert assistance using the tools \n\n	Programme Overview\n\n	Pres
 entations and hands-on sessions are planned on the following topics:\n\n		
 Setting up\, welcome and introduction\n	\n		LWM2 lightweight monitoring\n	
 \n		Score-P instrumentation and measurement\n	\n		Scalasca automated trace
  analysis\n	\n		Vampir interactive trace analysis\n	\n		Periscope automate
 d performance analysis\n	\n		Paraver trace analysis and performance predic
 tion\n	\n		MAQAO performance analysis &amp\; optimization\n	\n		MUST runti
 me error detection for MPI\n	\n		MAP profiling and performance reports\n	\
 n		Cray performance analysis tools\n\n	\n	A brief overview of the capabili
 ties of these and associated tools is provided in the VI-HPS Tools Guide.
 \n\n	The workshop will be held in English and run from 09:00 to not later 
 than 18:00 each day\, with breaks for lunch and refreshments. For particip
 ants from public research institutions in PRACE countries\, the course fee
  is sponsored through the PRACE PATC program. All participants are respons
 ible for their own travel and accommodation.\n	Classroom capacity is limit
 ed\, therefore priority will be given to applicants with parallel codes al
 ready running on the workshop computer system (Hornet)\, and those bringi
 ng codes from similar Cray systems to work on. Participants are therefore 
 encouraged to prepare their own MPI\, OpenMP and hybrid MPI+OpenMP paralle
 l application codes for analysis.\n\n	Hardware and Software Platforms\n\n	
 Hornet: 21-cabinet Cray Cascade XC40 system:\n\n		3944 compute nodes each
  with two Intel Xeon E5-2680v3 'Haswell' processors (2.50GHz\, 12 cores pe
 r processor\, 2 hardware threads per core) and 128 GB memory\n	\n		network
 : Aries dragonfly interconnect\n	\n		software: Cray lightweight CNL kernel
  &amp\; MPI\; Cray CCE\, GCC and Intel compilers\n\n	The local HPC system 
 Hornet is the primary platform for the workshop and will be used for the h
 ands-on exercises. Course accounts will be provided during the workshop to
  participants without existing accounts. Other systems where up-to-date ve
 rsions of the tools are installed can also be used when preferred\, though
  support may be limited and participants are expected to already possess u
 ser accounts on non-local systems. Regardless of whichever systems they in
 tend to use\, participants should be familiar with the relevant procedures
  for compiling and running their parallel applications (via batch queues w
 here appropriate).\n	 \n\n	The programme in detail can be found on the V
 I-HPS training web site.\n\nhttps://events.prace-ri.eu/event/358/
SUMMARY:17TH VI-HPS Tuning Workshop @ HLRS
URL;VALUE=URI:https://events.prace-ri.eu/event/358/
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