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DTSTAMP:20260705T072355Z
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DTSTART:20210308T140000Z
DTEND:20210312T173000Z
DESCRIPTION:All the PATC courses at BSC are free of charge.\n\nObjectives:
  \n\n\n\n\n\nThe tutorial will motivate the audience on the need for port
 able\, efficient programming models that put less pressure on program deve
 lopers while still getting good performance for clusters and clusters with
  GPUs\, and heterogeneous environments with FPGAs.\n\nMore specifically\, 
 the tutorial will:\n\nIntroduce the hybrid MPI/OmpSs parallel programming 
 model for future exascale systems\nDemonstrate how to use MPI/OmpSs to inc
 rementally parallelize/optimize:\n\nMPI applications on clusters of SMPs\,
  and\nLeverage CUDA and OpenCL kernels with OmpSs on clusters of GPUs\n\nI
 ntroduce the OmpSs@FPGA programming model\, how to write\, compile and exe
 cute applications on FPGAs\n\nShow the "implements" feature to explot para
 llelism across cores and IP cores\nAnalyze the performance of OmpSs@FPGA a
 pplications and tune them for the target architecture\n\n\n\n\n\nLevel:\n\
 nINTERMEDIATE: for trainees with some theoretical and practical knowledge\
 ; those who finished the beginners course\nADVANCED: for trainees able to 
 work independently and requiring guidance for solving complex problems\n\n
 Requirements: \n\nGood knowledge on the Linux command line environment (c
 ommands\, text editors\, GNU compilers...)\nGood knowledge of C/C++\nBasic
  knowledge of CUDA/OpenCL and/or Vivado HLS\nBasic knowledge of Paraver/Ex
 trae\n\nLearning Outcomes:\n\nThe students who finish this course will be 
 able to develop benchmarks and simple applications with the MPI/OmpSs prog
 ramming model to be executed in clusters and clusters of GPUs\, and with t
 he OmpSs@FPGA\, to be executed on FPGA boards\, like the Zedboard\, or Xil
 inx ZCU102 and Alveo.\n\nFurther information:\n\n\nIn the context of virtu
 al meetings\, the Organiser may facilitate live webstreaming and audio rec
 ording. You have the option to opt out of inclusion in recordings by conta
 cting our Education&amp\;Training team.\n\n\nCONTACT US for further detail
 s about MSc\, PhD\, Post Doc studies\, exchanges and collaboration in educ
 ation and training with BSC.\nFor further details about Postgraduate Studi
 es in UPC - Barcelona School of Informatics (FiB)\, visit the website\n\n\
 n\nSponsors: BSC and PRACE 6IP project are funding the PATC @ BSC training
  events.\nIf you want to learn more about PRACE Project\, visit the websit
 e.\n\n\n\nAgenda:\n\nDay 1 (Monday)\n\nSession 1 / 3:00pm – 6:30 pm (2 h
  lectures\, 1 h practical\, with a pair of short breaks)\n\n3.00pm – Int
 roduction to OmpSs\n4.30pm - Introduction to performance analysis tools (P
 araver\, Extrae)\n5.00pm – OmpSs single node programming hands-on\n6.30p
 m – Adjourn\n\nDay 2 (Tuesday)\n\nSession 2 / 3:00pm – 6:30 pm (1 h le
 ctures\, 2 h practical\, with a pair of short breaks)\n\n3.00h – Introdu
 ction to MPI/OmpSs\n4.00h – MPI/OmpSs hands-on\n6.00h – Adjourn\n\nDay
  3 (Wednesday)\n\nSession 3 / 3:00 am – 6:30 pm (1 h lectures\, 3 h prac
 tical\, with a pair of short breaks)\n\n3.00pm – More on OmpSs: GPU/CUDA
  programming\n4.00pm– OmpSs single node programming hands-on with GPUs\n
 6.30pm – Adjourn\n\nDay 4 (Thursday)\n\nSession 4 / 3:00pm – 6:30 pm (
 3 h tutorial/demo\, with a pair of short breaks)\n\n3:00pm – OmpSs@FPGA 
 tutorials\n4:30pm – OmpSs@FPGA demo / discussion\n6:30pm – Adjourn\n\n
 Day 5 (Friday)\n\nSession 4 / 3:00 am – 6:30 pm (3 h tutorial/demo\, wit
 h a pair of short breaks)\n\n3:00pm – Parallelization process with Paral
 lware Analyzer (Appentra)\n4:00pm – Parallelware Analyzer hands-on sessi
 on\n6:30pm – Adjourn\n\nEND of COURSE\nhttps://events.prace-ri.eu/event/
 1141/
SUMMARY:Heterogeneous Programming on GPUs with MPI + OmpSs @ BSC
URL;VALUE=URI:https://events.prace-ri.eu/event/1141/
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