BEGIN:VCALENDAR VERSION:2.0 PRODID:icalendar-ruby CALSCALE:GREGORIAN BEGIN:VEVENT DTSTAMP:20260708T141333Z UID:5bf9d4fd-2181-439d-b598-7371129933ef DTSTART:20190520T070000Z DTEND:20190522T150000Z DESCRIPTION:          \n\nContents\n\nIn the ever-growing complexity of computer architectures\, code optimization has become the main route to keep pace with hardware advancements and effectively make use of current and upcoming High Performance Computing systems.\n\nHave you ever asked yo urself:\n\n\n Where does the performance of my application lay?\n What is the maximum speed-up achievable on the architecture I am using? \n Is my i mplementation matching the HPC objectives?\n\n\nIn this workshop\, we will answer these questions and provide a unique opportunity to learn techniqu es\, methods and solutions on how to improve code\, how to enable the new hardware features and how to use the roofline model to visualize the poten tial benefits of an optimization process.\n\nWe will begin with a descript ion of the latest micro-processor architectures and how the developers can efficiently use modern HPC hardware\, in particular the vector units via SIMD programming and AVX-512 optimization and the memory hierarchy.\n\nThe attendees are then conducted along the optimization process by means of h ands-on exercises and learn how to enable vectorization using simple pragm as and more effective techniques\, like changing data layout and alignment .\n\nThe work is guided by the hints from the Intel® compiler reports (fi rst day)\, and using Intel® Advisor (second day). In the second day\, bes ides Intel Advisor\, the participants will be guided to the use of Intel® VTune™ Amplifier and of Intel Application Performance Snapshot as tools for investigating and improving the performance of a HPC application. Thi s year the workshop will consist of three days: we will dedicate most of t he third day to the Intel Math Kernel Library (MKL)\, in order to show how to gain performance through the use of libraries.\n\nWe provide also an N -body code\, to support the described optimization solutions with practica l hands-on.\n\nThe course is a PRACE training event.\n\nLearning Goals\n\n Through a sequence of simple\, guided examples of code modernization\, the attendees will develop awareness on features of multi and many-core archi tecture which are crucial for writing modern\, portable and efficient appl ications.\n\nA special focus will be dedicated to scalar and vector optimi zations for the latest Intel® Xeon® Scalable processor\, code-named Skyl ake\, utilized in the SuperMUC-NG machine at LRZ. The tutorial will have p resentations and demo session.\n\nThe workshop interleaves frontal and pra ctical sessions. Here is a preliminary outline:\n\nDay 1: main ideas and c ompiler reports\n\n09:00-09:45       Introduction\n\n09:45-10:15        Introduction to LRZ systems and software\n\n10:15-10:30        Login to hands-on cloud machines\n\n10:30-11:00       Coffee Brea k\n\n11:00-12:00       Code modernization approach\n\n12:00-12:30        Scalar optimization\n\n12:30-13:30       Lunch\n\n13:30-1 4:30       Compiler autovectorization\n\n14:30-15:00       Dat a layout from AoS to SoA\n\n15:00-15:30       Coffee Break\n\n15:30- 16:00       Memory access optimization\n\n16:00-16:45       SD LT (Intel SIMD Layout Templates) / Explicit vectorization / Skylake optimi zation\n\n16:45-17:00       Wrap-up\n\nDay 2: performance tools\n\n0 9:00-09:30       Introduction to roofline model\n\n09:30-10:30        Intel Advisor analysis\n\n10:30-11:00       Coffee Break\n\n1 1:00-12:30       Intel Advisor hands-on\n\n12:30-13:30       L unch\n\n13:30-14:15       Introduction on VTune\n\n14:15-15:00        Demo on VTune\n\n15:00-15:30       Coffee Break\n\n15:30-16:0 0       Introduction on APS\n\n16:00-16:30       Demo / hands- on on APS\n\n16:30-17:00       Wrap-up\n\nDay 3: performance librari es (preliminary)\n\nIntel MKL:\n\n      Introduction and General Tip s\n\n      BLAS\n\n      Sparse BLAS\n\n      FFT\n\n       RNG\n\n      VML\n\n      Sparse Solver\n\nPlease br ing your own laptop (with X11 support and an ssh client installed) for the hands-on sessions! For GUI applications we require the installation of vn cviewer (https://www.realvnc.com/en/connect/download/viewer/ )”.\n\n \n \nAbout the Lecturers\n\nFabio Baruffa is a software technical consulting engineer in the Developer Products Division (DPD) of the Software and Serv ices Group (SSG) at Intel. He is working in the compiler team and provides customer support in the high performance computing (HPC) area. Prior at I ntel\, he has been working as HPC application specialist and developer in the largest supercomputing centers in Europe\, mainly the Leibniz Supercom puting Center and the Max-Plank Computing and Data Facility in Munich\, as well as Cineca in Italy. He has been involved in software development\, a nalysis of scientific code and optimization for HPC systems. He holds a Ph D in Physics from University of Regensburg for his research in the area of spintronics device and quantum computing.\n\nGennady Fedorov is a Technic al Consulting Engineer supporting technical and Intel Performance Librarie s ( IPP\, MKL and DAAL) within the Intel Architecture\, Graphics and Softw are Group at Intel in Russia. His focus areas are Image Processing\, Crypt o\, Compressing techniques\, High Performance Computing and Artificial Int elligence.\n\nLuigi Iapichino holds a position of scientific computing exp ert at LRZ and is a former member of the Intel Parallel Computing Center. His main tasks are code modernization for many-core and multi-core systems \, and HPC high-level support in the PRACE framework. He got in 2005 a PhD in physics from the Technical University of Munich\, working at the Max P lanck Institute for Astrophysics. Before moving to LRZ in 2014\, he worked at the Universities of Würzburg and Heidelberg\, involved in research pr ojects related to computational astrophysics. He is the team lead of the L RZ Application Lab for Astro and Plasma Physics (AstroLab).\n\nGerald Math ias works in the application support for the HPC systems at LRZ since 2015 and leads the Biolab@LRZ. After his PhD in Computational Biopyhsics at th e LMU Munich he joined the chair of Theoretical Chemistry at the RUB in Bo chum afterwards as a postdoc. He is experienced in the development and opt imization of highly parallel ab initio and force field based molecular dyn amics codes\, both in Fortran and C.\n\nMichael Steyer is a Technical Cons ulting Engineer supporting technical and High Performance Computing segmen ts within the Intel Architecture\, Graphics and Software Group at Intel in Germany. His focus areas are High Performance Computing and Artificial In telligence.\nhttps://events.prace-ri.eu/event/872/ SUMMARY:HPC code optimisation workshop @ LRZ URL;VALUE=URI:https://events.prace-ri.eu/event/872/ END:VEVENT END:VCALENDAR