BEGIN:VCALENDAR VERSION:2.0 PRODID:icalendar-ruby CALSCALE:GREGORIAN BEGIN:VEVENT DTSTAMP:20260704T225508Z UID:00af86a7-b5ad-4975-8f77-ab92d4761fc2 DTSTART:20170626T070000Z DTEND:20170628T160000Z DESCRIPTION:\n\nThe course discusses Intel’s Many Integrated Core (MIC) a rchitecture and programming models for Intel Xeon Phi co/processors in ord er to enable programmers to achieve good performance of their applications . The course will mainly concentrate on techniques relevant for Knights La nding (KNL) based systems\, like the future KNL cluster CoolMUC3 to be ins talled at LRZ\, soon.\n\nThe workshop covers a wide range of topics from t he description of the hardware of the Intel Xeon Phi co-/processors throug h information about the basic programming models as well as information ab out vectorisation and MCDRAM usage up to tools and strategies how to analy se and improve the performance of applications.\n\nThe workshop will inclu de both theoretical and practical hands-on sessions.\n\nThere will also be a session with invited talks by speakers from Intel\, IPCC@LRZ\, IPCC@TUM \, IPCC@IT4Innovations\, IPP\, RRZE and the University of Regensburg about Intel Xeon Phi - especially KNL - experience and best practice recommenda tions.\n\nThe course is developed within the joint German-Czech Republic p roject CzeBaCCA. A workshop on "HPC for natural hazard assessment and disa ster mitigation" of this project will take place at LRZ directly after thi s course (see https://www.lrz.de/services/compute/courses/2017-06-28_hnha1 s17/).\n\nPlease bring your own laptop (with an ssh client installed) for the hands-on sessions!\n\n\n\nFigure: Participants of the MIC Workshop 201 6\n\nPreliminary schedule\n\nMonday\, June 26\, 2017\, Kursraum 2\, H.U.01 0 (course room)\n\n09:00-10:00 Welcome &\; Introduction (Weinberg)\n 10 :00-10:30 Overview of the Intel MIC architecture (Allalen)\n 10:30-11:00 C offee break\n 11:00-11:30 Overview of the Intel MIC programming models (Al lalen)\n 11:30-12:00 Native mode KNC and KNL programming (Allalen)\n 12:00 -13:00 Lunch break\n 13:00-13:45 KNL Memory Modes and Cluster Modes\, MCDR AM (Weinberg)\n 13:45:15:30 Offloading (Weinberg)\n 15:30-16:00 Coffee bre ak\n 16:00-17:00 MKL (Allalen)\nTuesday\, June 27\, 2017\, Kursraum 2\, H. U.010 (course room)\n\n09:00-10:30 Vectorisation and Intel Xeon Phi perfor mance optimisation (Allalen)\n 10:30-11:00 Coffee break\n 11:00-12:00 Guid ed SuperMUC/MIC Tour (Weinberg/Allalen)\n 12:00-13:00 Lunch break\n 13:00- 15:30 KNL code optimisation process (Baruffa)\n 15:30-16:00 Coffee Break\n 16:00-17:00 Profiling tools: Intel Advisor (Baruffa)\n 18:00 - open end a t GARNIX  https://www.garnix-festival.de/\nWednesday\, June 28\, 2017\, 0 9:00-12:00\, Hörsaal\, H.E.009 (Lecture Hall)\n\n09:00-10:30 Many-core Pr ogramming with OpenMP 4.x (Michael Klemm\, Intel)\n 10:30-10:45 Coffee Bre ak\n 10:45-12:00 Advanced KNL programming techniques (Intrinsics\, Assembl er\, AVX-512\,...) (Jan Eitzinger\, RRZE)\nWednesday\, June  28\,  2017\ , 13:00-18:00\, Hörsaal\, H.E.009 (Lecture Hall)\n\nPlenum session with i nvited talks on MIC experience and best practice recommendations\n(joint s ession with the Scientific Workshop "HPC for natural hazard assessment and disaster mitigation")\, public session\n\n13:00-13:30 Luigi Iapichino\, I PCC@LRZ: "Performance Optimization of Smoothed Particle Hydrodynamics and Experiences on Many-Core Architectures"\n 13:30-14:00 Michael Bader/Carste n Uphoff\, IPCC@TUM: "Extreme-scale Multi-physics Simulation of the 2004 S umatra Earthquake"\n 14:00-14:30 Vit Vondrak/Branislav Jansik\, IPCC@IT4I: "Development of Intel Xeon Phi Accelerated Algorithms and Applications at IT4I"\n 14:30-15:00 Michael Klemm\, Intel: "Application Show Cases on Int el® Xeon Phi™ Processors"\n 15:00-15:30 Coffee Break\n 15:30-16:00 Jan Eitzinger\, RRZE: "Evaluation of Intel Xeon Phi "Knights Landing":  Initi al impressions and benchmarking results"\n 16:00-16:30 Piotr Korcyl\, Univ ersity of Regensburg: "Lattice Quantum Chromodynamics on the MIC architect ures"\n 16:30-17:00 Nils Moschüring\, IPP: "The experience of the HLST on Europes biggest KNL cluster"\n 17:00-17:30 Andreas Marek\, Max Planck Com puting and Data Facility (MPCDF)\, "Porting  the ELPA library to the KNL architecture"\n 17:30-18:00 Q&\;A\, Wrap-up\nThe course material is de veloped within PRACE and the joint German-Czech Republic project CzeBaCCA. \n\nThe course is a PRACE Advanced Training Center event.\n\nA social eve nt for participant and instructor networking is planned for the evening on Tuesday\, 27 June.\n\nAbout the tutors\n\nDr. Momme Allalen received his Ph.D in theoretical Physics from the University of Osnabrück in 2006. He worked in the field of molecular magnetics through modelling techniques su ch as the exact numerical diagonalisation of the Heisenberg model. He join ed the Leibniz Computing Centre (LRZ) in 2007 working in the High Performa nce Computing group. His tasks include user support\, optimisation and par allelisation of scientific application codes\, and benchmarking for charac terising and evaluating the performance of high-end supercomputers. His re search interests are various aspects of parallel computing and new program ming languages and paradigms.\n\nDr. Fabio Baruffa is HPC Application Spec ialist at LRZ and member of the Intel Parallel Computing Center (IPCC). He was working as HPC researcher at Max-Planck (MPCDF)\, Jülich Research Ce nter and Cineca where he was involved in HPC software development. His mai n research interests are in the area of computational methods and optimiza tions for HPC systems. He holds a PhD in Physics from University of Regens burg for his research in the area of spintronics.\n\nDr.-Ing. Jan Eitzinge r (RRZE) (formerly Treibig) holds a PhD in Computer Science from the Unive rsity of Erlangen. He is now a postdoctoral researcher in the HPC Services group at Erlangen Regional Computing Center (RRZE). His current research revolves around architecture-specific and low-level optimization for curre nt processor architectures\, performance modeling on processor and system levels\, and programming tools. He is the developer of LIKWID\, a collecti on of lightweight performance tools. In his daily work he is involved in a ll aspects of user support in High Performance Computing: training\, code parallelization\, profiling and optimization\, and the evaluation of novel computer architectures.\n\nDr.-Ing. Michael Klemm (Intel Corp.) obtained an M.Sc. in Computer Science in 2003 and received a Doctor of Engineering degree (Dr.-Ing.) from the Friedrich-Alexander-University Erlangen-Nurembe rg\, Germany\, in 2008. Michael Klemm works in the Developer Relations Div ision at Intel in Germany and his areas of interest include compiler const ruction\, design of programming languages\, parallel programming\, and per formance analysis and tuning. Michael Klemm joined the OpenMP organization in 2009 and was appointed CEO of the OpenMP ARB in 2016.\n\nDr. Volker We inberg studied physics at the Ludwig Maximilian University of Munich and l ater worked at the research centre DESY. He received his PhD from the Free University of Berlin for his studies in the field of lattice QCD. Since 2 008 he is working in the HPC group at the Leibniz Supercomputing Centre an d is responsible for HPC and PATC (PRACE Advanced Training Centre) courses at LRZ\, new programming languages and the Intel Xeon Phi based system Su perMIC. Within PRACE-4IP he took over the leadership to create Best Practi ce Guides for new architectures and systems.\n\n \n\n \n\nhttps://events .prace-ri.eu/event/609/ SUMMARY:Intel MIC Programming Workshop @ LRZ URL;VALUE=URI:https://events.prace-ri.eu/event/609/ END:VEVENT END:VCALENDAR