BEGIN:VCALENDAR VERSION:2.0 PRODID:icalendar-ruby CALSCALE:GREGORIAN BEGIN:VEVENT DTSTAMP:20260704T141916Z UID:4c5c02ff-3455-4101-8636-d2bd522e8de8 DTSTART:20170207T083000Z DTEND:20170208T160000Z DESCRIPTION:The course discusses Intel’s Many Integrated Core (MIC) archi tecture. It covers various programming and optimisation techniques for Int el  Xeon Phi coprocessors. We will mainly focus on the KNC version of the chip\, but will also introduce the Knights Landing chip. The hands-on ses sions are done on the Intel Xeon Phi based Salomon system at the IT4Innova tions National Supercomputing Center.\n\nThe topics of the first 1.5 days reach from an introduction about the Intel MIC architecture and various In tel Xeon Phi programming models (Offloading\, Native mode\, MKL\, OpenMP\, MPI etc.) to advanced topics about vectorisation and performance optimisa tion\, interleaved with many hands-on sessions on the Intel Xeon Phi based Salomon system at IT4Innovations.\n\nDuring a plenum session on the last day invited speakers talk about MIC experience and best practice recommend ations using Intel Xeon Phi based systems like e.g. Salomon @ IT4Innovatio ns.\n\nThe course is developed within the joint German-Czech project CzeBa CCA\, as a follow-up of the MIC porogramming workshop of February 2016. A two-day Scientific Workshop "HPC in Atmosphere Modelling and Air Related E nvironmental Hazards" of this project will take place at IT4Innovations di rectly after this course\, on February 9-10\, 2017 - see its web page  fo r details.\n\nThe course is a PRACE Advanced Training Center event.\n\nPre liminary schedule\n\n \n\nTuesday February 7\,  2017\n  \n  \n 09: 00-09:30\n Registration\n 09:30-09:45\n Welcome\n 09:45-10:30\n Sa lomon intro\n 10:30-11:00\n Coffee break\n 11:00-12:00\n Overview of the Intel MIC architecture and programming models\n 12:00-13:00\n Lunc h break\n 13:00-13:30\n Native mode programming\n 13:30-15:30\n Open MP and offloading I\n 15:30-16:00\n Coffee break\n 16:00-17:00\n Ope nMP and offloading  II\n  \n 17:00-18:00\n MKL\n  \n  \n\nWedn esday February 8\,  2017\n  \n  \n 09:00-10:30\n MPI\n  \n 10 :30-11:00\n Coffee break\n 11:00-12:00\n Vectorisation and Intel Xeon Phi performance optimisation\n  \n 12:00-13:00\n Lunch break\n Ple num session with invited talks Wednesday February 8\,  2017:\n\n13:00-13: 45\n \n Jan Zapletal ( IT4Innovations): Boundary element quadrature sc hemes for multi- and many-core architectures\n \n 13:45-14:15\n Jiri Jaros (VUT Brno): Acceleration of the k-Wave toolbox on Xeon Phi\n 14:15- 15:00\n Lukasz Szustak\, Roman Wyrzykowski (TU Czestochowa): Exploring t he impact of Intel MIC and Intel CPU architectures on accelerating scienti fic applications\n 15:00-15:30\n Coffee break\n 15:30-16:15\n Michal Merta (IT4Innovations): Acceleration of the ESPRESO domain decomposition library\n 16:15-17:00\n Milan Jaros (IT4Innovations): Acceleration of B lender Cycles Render Engine using Intel® Xeon Phi™\n About the tutors\ n\n \n\nMomme Allalen received his Ph.D in theoretical Physics from the U niversity of Osnabrück in 2006. He worked in the field of molecular magne tics through modelling techniques such as the exact numerical diagonalisat ion of the Heisenberg model. He joined the Leibniz Computing Centre (LRZ) in 2007 working in the High Performance Computing group. His tasks include user support\, optimisation and parallelisation of scientific application codes\, and benchmarking for characterising and evaluating the performanc e of high-end supercomputers. His research interests are various aspects o f parallel computing and new programming languages and paradigms.\n\nBrani slav Jansik has obtained his PhD in computational chemistry at Royal Insti tute of Technology\, Sweden in 2004. He took postdoctoral position at IPCF \, Consiglio Niazionale delle Ricerche\, Italy\,  to carry on development and applications of high performance computational methods for molecular optical properties. Since 2006 he worked on development of highly parallel optimization methods in the domain of electronic structure theory at Aarh us University\, Denmark. In 2012 he joined IT4Innovations\, the Czech nati onal supercomputing center as a head of supercomputing services. He publis hed over 35 papers and co-authored the DALTON electronic structure theory code.\n\nVolker Weinberg studied physics at the Ludwig Maximilian Universi ty of Munich and later worked at the research centre DESY. He received his PhD from the Free University of Berlin for his studies in the field of la ttice QCD. Since 2008 he is working in the HPC group at the Leibniz Superc omputing Centre and is responsible for HPC and PATC (PRACE Advanced Traini ng Centre) courses at LRZ\, new programming languages and the Intel Xeon P hi based system SuperMIC. Within PRACE-4IP he took over the leadership to create Best Practice Guides for new architectures and systems.\n\n\n\n \n \nhttps://events.prace-ri.eu/event/583/ SUMMARY:Intel MIC Programming Workshop @ IT4I URL;VALUE=URI:https://events.prace-ri.eu/event/583/ END:VEVENT END:VCALENDAR