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DTSTAMP:20260706T121951Z
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DTSTART:20180716T070000Z
DTEND:20180718T140000Z
DESCRIPTION: \n\nThe course discusses programming models and optimisation 
 techniqes for Intel manycore processors in order to enable programmers to 
 achieve good performance of their applications. The course will concentrat
 e on techniques also relevant for the latest Intel® Xeon® Scalable proce
 ssor\, code-named Skylake\, which is going to be utilized in the upcoming 
 SuperMUC-NG machine at LRZ. Futhermore programming and optimisation techni
 ques for Intel Knights Landing (KNL) based systems like the KNL cluster Co
 olMUC3  at LRZ will be discussed.\n\nThe workshop covers a wide range of 
 topics from the description of the hardware of the Intel processors throug
 h information about the basic programming models as well as information ab
 out vectorisation and MCDRAM usage up to tools and strategies how to analy
 se and improve the performance of applications.\n\nTopics covered will inc
 lude:\n\nOverview of the Intel Skylake and MIC architecture\n	Overview of 
 programming models\n	Vectorisation and basic performance optimisation\n	Co
 de optimisation process for Intel processors\n	Intel profiling tools and r
 oofline model\n	KNL memory modes and cluster modes\, MCDRAM\n	Advanced opt
 imisation techniques (RRZE)\n	Skylake programming using Intrinsics and Ass
 embler (RRZE)\n	Skylake nodelevel- and microarchitecture in detail (Intel)
 \n	OpenMP SIMD (Intel)\n	OpenMP affinity and outlook on OpenMP 5.0 memory 
 features (Intel)\nThe workshop will include both theoretical and practical
  hands-on sessions.\n\nAgenda:\n\nMonday\, July 16\, 2018\, Seminarraum 1\
 , H.E.008\n\n09:00-10:00 Welcome &amp\; Introduction (Volker Weinberg\, LR
 Z)\n\n10:00-10:30 Overview of the Intel Skylake and MIC architecture (Momm
 e Allalen\, LRZ)\n\n10:30-11:00 Coffee Break\n\n11:00-11:30 Overview of pr
 ogramming models &amp\; Using the LRZ Linux-Cluster (Momme Allalen\, LRZ)\
 n\n11:30-12:00 Hands-on\n\n12:00-13:00 Lunch break\n\n13:00-14:00 Guided S
 uperMUC/CoolMUC-3 Tour (Weinberg/Allalen)\n\n14:00-15:00 Vectorisation and
  basic performance optimisation (Momme Allalen\, LRZ)\n\n15:00-15:30 Coffe
 e break\n\n15:30-16:00 Hands-on\n\n \n\nTuesday\, July 17\, 2018\, Semina
 rraum 1\, H.E.008\n\n09:00-10:30 KNL Memory Modes and Cluster Modes\, MCDR
 AM (Volker Weinberg\, LRZ)\n\n10:30-11:00 Coffee Break\n\n11:00-12:00 Hand
 s-On\n\n12:00-13:00 Lunch break\n\n13:00-14:30 Code optimization process (
 Luigi Iapichino\, LRZ)\n\n14:30-15:00 Coffee Break\n\n15:00-16:00 Intel pr
 ofiling tools and roofline model (Luigi Iapichino\, LRZ)\n\n \n\nWednesda
 y\, July 18\, 2018\, Hörsaal\, H.E.009\n\n10:00-12:00 Public Lecture: “
 Taming Intel Xeon Processors with OpenMP” (Michael Klemm\, Intel) \n\n12
 :00-13:00 Lunch break\n\nWednesday\, July 18\, 2018\, Seminarraum 1\, H.E.
 008\n\n13:00-14:30 Advanced optimisation techniques (J. Eitzinger\, RRZE)\
 n\n14:30-15:00 Coffee Break\n\n15:00-16:00 Intel Skylake programming using
  Intrinsics and Assembler (J. Eitzinger\, RRZE)\n\nPlease bring your own l
 aptop (with an ssh client installed) for the hands-on sessions!\n\n\n\nFig
 ure: Participants of the MIC Workshop 2016\n\n \n\nAbout the tutors\n\n 
 \n\nDr. Momme Allalen received his Ph.D in theoretical Physics from the Un
 iversity of Osnabrück in 2006. He worked in the field of molecular magnet
 ics through modelling techniques such as the exact numerical diagonalisati
 on of the Heisenberg model. He joined the Leibniz Computing Centre (LRZ) i
 n 2007 working in the High Performance Computing group. His tasks include 
 user support\, optimisation and parallelisation of scientific application 
 codes\, and benchmarking for characterising and evaluating the performance
  of high-end supercomputers. His research interests are various aspects of
  parallel computing and new programming languages and paradigms.\n\nDr.-In
 g. Jan Eitzinger (RRZE) (formerly Treibig) holds a PhD in Computer Science
  from the University of Erlangen. He is now a postdoctoral researcher in t
 he HPC Services group at Erlangen Regional Computing Center (RRZE). His cu
 rrent research revolves around architecture-specific and low-level optimiz
 ation for current processor architectures\, performance modeling on proces
 sor and system levels\, and programming tools. He is the developer of LIKW
 ID\, a collection of lightweight performance tools. In his daily work he i
 s involved in all aspects of user support in High Performance Computing: t
 raining\, code parallelization\, profiling and optimization\, and the eval
 uation of novel computer architectures.\n\nDr. Luigi Iapichino holds a pos
 ition of scientific computing expert at LRZ and he is member of the Intel 
 Parallel Computing Center (IPCC). His main tasks are code modernization fo
 r many-core systems\, and HPC support. He got in 2005 a PhD in physics fro
 m TU München\, working at the Max Planck Institute for Astrophysics. Befo
 re moving to LRZ in 2014\, he worked at the Universities of Würzburg and 
 Heidelberg\, involved in research projects related to computational astrop
 hysics.\n\nDr.-Ing Michael Klemm (Intel) is part of the Developer Relation
 s Division at Intel. His focus is on High Performance and Throughput Compu
 ting. He received a Doctor of Engineering degree (Dr.-Ing.) in Computer Sc
 ience from the Friedrich-Alexander-University Erlangen-Nuremberg\, Germany
 .  His areas of interest include compiler construction\, design of progra
 mming languages\, parallel programming\, and performance analysis and tuni
 ng. Michael is Intel representative in the OpenMP Language Committee and i
 s also the Chief Executive Officer of the OpenMP Architecture Review Board
 .\n\nDr. Volker Weinberg studied physics at the Ludwig Maximilian Universi
 ty of Munich and later worked at the research centre DESY. He received his
  PhD from the Free University of Berlin for his studies in the field of la
 ttice QCD. Since 2008 he is working in the HPC group at the Leibniz Superc
 omputing Centre and is responsible for HPC and PATC (PRACE Advanced Traini
 ng Centre) courses at LRZ\, new programming languages and the Intel Xeon P
 hi based system SuperMIC. Within PRACE-4IP he took over the leadership to 
 create Best Practice Guides for new architectures and systems.\n\nhttps://
 events.prace-ri.eu/event/736/
SUMMARY:Intel Manycore Programming Workshop @ LRZ
URL;VALUE=URI:https://events.prace-ri.eu/event/736/
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