The Intel Xeon Phi co-processor is a novel accelerator technology that possesses several appealing features, including high peak performance and the ability to use familiar programming models such as OpenMP and MPI. This course is an introduction to the Xeon Phi architecture, execution model, and programming.Monday 2 December

    09:00 - 09:15 Course introduction

    09:15 - 10:45 Introduction to Xeon Phi

    10:30 - 10:45 Coffee break

    10:45 - 12:00 Programming the Xeon Phi Coprocessor

    12:00 - 13:00 Lunch break

    13:00 - 13:30 CSC Cluster introduction

    13:30 - 14:30 Exercises

    14:30 - 14:45 Coffee break

    14:45 - 15:45 Exercises

    15:45 - 16:00 Wrap-up day 1

Tuesday 3 December

    09:00 - 09:45 Programming Xeon Phi (MPI)

    09:45 - 10:45 Exericises

    10:45 - 11:00 Coffee break

    11:00 - 12:00 Performance analysis and optimization

    12:00 - 13:00 Lunch break

    13:00 - 14:30 Exercises

    14:30 - 14:45 Coffee break

    14:45 - 15:15 Debugging

    15:15 - 15:45 Case study

    15:45 - 16:00 Wrap-up day 2

Learning outcome
Familiarity with the technology and programming model; knowledge on available tools and libraries. After the course the participants should be able to start porting their applications on Xeon Phi platforms.Pre-requisites
The PATC course Introduction to Parallel Programming or equivalent background knowledge on MPI and OpenMP together with fluency in Fortran 95 and/or C programming. Experience of programming using basic threading is essential to fully benefit from the course. Familiarity with the following will be useful as well: CUDA, OpenCL, profiling, debugging, Intel VTune, Intel compilers, SLURM and TotalView.Price: Free of chargeLecturers: Olli-Pekka Lehto (CSC), Mikko Byckling (CSC), Alejandro Duran (Intel)

https://events.prace-ri.eu/event/177/