Date: 1 - 2 December 2016

This course teaches performance engineering approaches on the compute node level. "Performance engineering" as we define it is more than employing tools to identify hotspots and bottlenecks. It is about developing a thorough understanding of the interactions between software and hardware. This process must start at the core, socket, and node level, where the code gets executed that does the actual computational work. Once the architectural requirements of a code are understood and correlated with performance measurements, the potential benefit of optimizations can often be predicted. We introduce a "holistic" node-level performance engineering strategy, apply it to different algorithms from computational science, and also show how an awareness of the performance features of an application may lead to notable reductions in power consumption.

The course is a PRACE Advanced Training Center event.

Introduction and Motivation
Performance Engineering as a process
Topology and affinity in muticore systems
Microbenchmarking for architectural exploration
The Roofline Model
Basics and simple applications
Case study: sparse matrix-vector multiplication
Case study: Jacobi smoother

Model-guided optimization
Blocking optimization for the Jacobi smoother

Programming for optimal use of parallel resources
Single Instruction Multiple Data (SIMD)
    Cache-coherent Non-Uniform Memory Architecture (ccNUMA)
    Simultaneous Multi-Threading (SMT)

Pattern-guided performance engineering
Hardware performance metrics
    Typical performance patterns in scientific computing
    Examples and best practices

Beyond Roofline: The ECM Model
Optional: Energy-efficient code execution

https://events.prace-ri.eu/event/531/

Event types:

  • Workshops and courses


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